packages: 70-pin plastic ssop (ssop70-p-500-k) 70-pin plastic tsop (tsop70-p-400/0.65) 1 semiconductor 524,288-double words x 32-bit or 1,048,576-words x 16-bit maskrom 4double words x 32-bit or 8words x 16-bit/page mode maskrom description features pin compatible otp available internal powerdown function tri-state output configurations input/output ttl compatible access time 100ns max (normal access) 30ns max (page access) 524,288-double words x 32-bit / 1,048,576-words x 16-bit single 3.3v power supply the oki msm53v1655f is a 524,288-double words x 32-bit or 1,048,576-words x 16-bit cmos mask rom with an asynchronous page read mode. each page is organized 4double words x 32-bit or 8 words x 16-bit. it operates on a single 3.3v power supply and is ttl compatible. the chip's asynchronous i/o requires no external clock assuring easy operation. a power-down mode provides low power dissipation when the chip is not selected. the ce and oe pins are provided as control signals that permit three-stated output allowing easy memory expansion on a system bus.the msm531655f is suited for use as large capacity fixed memory for microcomputers and data terminals. msm53v1655f 4-double words(a1,a0) or 8-words(a1,a0,a-1) / page
70 msm53v1655f 2 1 a0 2 a1 69 3 a2 68 4 a3 67 5 a4 66 6 a5 65 7 vcc 64 8 d0 63 9 d16 62 10 d1 61 11 d17 60 12 vss 59 13 vcc 58 14 d2 57 15 d18 56 16 d3 55 17 d19 54 18 d4 53 19 d20 52 20 d5 51 21 d21 50 22 vss 49 23 vcc 48 24 d6 47 25 d22 46 26 d7 45 27 d23 44 28 vss 43 29 a6 42 30 a7 41 31 a8 40 32 a9 39 33 a10 38 34 a11 37 35 a12 36 nc nc nc word oe ce vss d31/a-1 d15 d30 d14 vss vcc d29 d13 d28 d12 d27 d11 d26 d10 vss vcc d25 d9 d24 d8 vcc nc a18 a17 a16 a15 a14 a13 pin name function d31/a-1 data output / address input a0 to a18 address input d0 to d30 data output ce oe output enable word mode switch (h:dw/l:w) v cc , v ss power supply chip enable pin configuration
msm53v1655f 3 a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 a15 a16 a17 a18 block diagram d0 ce oe ce control oe address buffer memory cell matrix 524,288 x 32 or 1,048,676 x 16 function table d16 d2 d18 d4 d20 d6 d22 d8 d24 d10 d26 d12 d28 d14 d30 output switching between 16 and 32 bits a-1 word ce h msb l l l l oe x h l l l byte x x h l l input inhibited (d31) d16 to d31 lsb d out mode d16?31 d0?15 a-1/d31 x x l h d0 to d15 d0 to d15 hi-z hi-z hi-z hi-z d16 to d31 hi-z hi-z hi-z 32 bit 16 bit a0 a-1 a18 a18 v cc v ss llh input inhibited (d31) d0 to d15 d16 to d31 32 bit(page mode) a0 a1 l l l l l l d16 to d31 l h d0 to d15 hi-z hi-z 16 bit(page mode) a-1 a1 d1 d17 d3 d19 d5 d21 d7 d23 d9 d25 d11 d27 d13 d29 d15 d31 x decoder y decoder multiplexer & page data latch output buffer
msm53v1655f 4 recommended operating conditions absolute maximum limits dc characteristics operating temperature storage temperature power supply voltage input voltage output voltage power dissipation parameter symbol unit limits conditions v v v w ?.3 to 7 ?.3 to v cc + 0.5 ?.3 to v cc + 0.5 0 to 70 ?5 to 150 1.0 ? ? per package t opr = 25? to v ss t opr t stg v cc v i v o p d power supply voltage "h" input voltage "l" input voltage parameter symbol unit 3.6 typ. 3.0 conditions min. max. 3.3 v 0.0 0.0 0.0 v 2.2 3.3 v 0.8 0.0 v operating temperature 70 0 limits ?.3 ? v cc v ss v ih v il t opr "h" output voltage "l" output voltage parameter symbol unit typ. 2.4 conditions min. max. power supply current (operating) v 0.4 v 10 ? 100 ma 50 ? 500 ? input leakage current output leakage current power supply current (standby) 10 ? limits (v cc = 3.3v?.3v, ta = 0 to 70?) i oh = ?00ua i oh = 1.0ma ?0 ?0 ce = v cc ?.2v ce = v ih min v i = 0 to v cc v o = 0 to v cc ce = v ih min ce = v il, oe = v ih, t c = 100ns v oh i li i lo i cc i ccs i ccs 1 v ol v cc + 0.5
msm53v1655f 5 address t c oe d out t acc t oe t oh ac characteristics test conditions parameter conditions input signal level transtion time timing reference level load condition v ih =3.0v, v il =0.0v t r =t f =5ns input voltage=1.5v output voltage=0.8v&2.0v cl=100pf+1ttl random access cycle time parameter symbol unit typ. 100 conditions min. max. ns 100 30 30 0 25 0 0 read cycle random address access time page set up time oe access time ce output disable time oe output disable time output hold time ns ns ns ns ns ns limits (ta = 0 to 70?) 100 t c t acc t pset t oe t chz t ohz t oh page access cycle time 30 ns 30 100 page access time ce access time ns ns t pc t pac t ce read cycle (note1)
msm53v1655f 6 ce t c oe d out t ce t chz t oe page mode read cycle (note4) address a2 - a17 t pset d out t acc t pac t pac t pac t pc t pc t pc address a0 - a1 read cycle (note2) (note 3) note) 1. ce is low level. 2. address is fixed before or at the same time when ce level falls. 3. t chz & t ohz indicate the time until floating. they are not determined by the output level. 4. ce is low level and oe is low level. i/o capacitance input capacitance output capacitance parameter symbol c i unit 8 typ. conditions min. max. c o pf 10 rated value pf v i =0v v o =0v t ohz (note 3)
semiconductor notice the information contained herein can change without notice owing to product and/or technical im- provements. before using the product, please make sure that the information being referred to is up-to- date. the outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected opera- tion resulting from misuse, neglect, improper installation, repair, alteration or accident, improper han- dling, or unusual physical or electrical stress including, but not limited to, exposure to parameters be- yond the specified maximum ratings or operation outside the specified operating range. neither indemnity against nor license of a third partys industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. no responsibility is assumed by us for any infringement of a third partys right which may result from the use thereof. the products listed in this document are intended for use in general electronics equipment for commer- cial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). these products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. such applications include, but are not limited to, traffic and automotive equipment, safety de- vices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. certain products in this document may need government approval before they can be exported to par- ticular countries. the purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. no part of the contents cotained herein may be reprinted or reproduced without our prior permission. all brand, company and product names are the trademarks or registered trademarks of their respective owners. copyright 1998 oki electric industry co., ltd.
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